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datasheet 1 output pcie ge n1/2 synthesizer idt5v41064 idt? 1 output pcie gen1/2 synthesizer 1 idt5v41064 rev g 112111 recommended applications one output synthesizer for pcie gen1/2 general description the idt5v41064 is a pcie gen2 compliant spread spectrum capable clock generator. the device has 1 differential hcsl output and can be used in communication or embedded systems to subtantially reduce electro-magnetic interference (emi). spread spectrum can be enabled via a select pin. output features ? 1 - 0.7v current mode differential hcsl output pairs features/benefits ? 16-pin qfn package; very small board footprint ? spread-spectrum capable; reduces emi ? outputs can be terminated to lvds; can drive a wider variety of devices ? spread enable via pin selection; no software required to configure device ? industrial temperature range available; supports demanding embedded applications ? for pcie gen3 applications, see the 5v41234 key specifications ? cycle-to-cycle jitter < 100 ps ? pcie gen2 phase jitter < 3.0ps rms block diagram phase lock loop clock buffer/ crystal oscillator vdd gnd x2 25 mhz crystal /clock clk clk r r (iref) x1 crystal tuning capacitors control logic ss1
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 2 idt5v41064 rev g 112111 pin assignment spread spectrum select table pin descriptions 1 16-pin qfn 5 9 13 gnd x1 x2 nc gnd ss1 iref nc nc nc nc vdd clk clk gnd vdda ss1 spread% 0 -0.5% down 1 no spread pin number pin name pin type pin description 1 gnd power connect to ground. 2 x1 xi crystal or clock input. connect to 25 mhz crystal or single-ended clock. 3 x2 xo crystal connection. connect to parallel mode crystal. leave floating if x1 is driven by single-ended clock. 4 nc ? no connect. 5 gnd power connect to ground. 6 ss1 input spread select 1. see table above. internal pull-up resistor. 7 iref output 475 precision resistor must be attached to this pin, which is connected to internal current source. 8 nc ? no connect. 9 vdda power connect to 3.3v and filter as analog supply. 10 gnd power connect to ground. 11 clk output hcsl complementary output clock. 12 clk output hcsl true output clock. 13 nc ? no connect. 14 nc ? no connect. 15 vdd power connect to 3.3 v for osc and digital circuits. 16 nc ? no connect.
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 3 idt5v41064 rev g 112111 applications information external components a minimum number of external components are required for proper operation. decoupling capacitors decoupling capacitors of 0.01 f should be connected between vdd and the ground plane (pin 4) as close to the vdd pin as possible. do not share ground vias between components. route power from power source through the capacitor pad and then into idt pin. crystal a 25 mhz fundamental mode parallel resonant crystal with c l = 16 pf should be used. this crystal must have less than 300 ppm of error across temperature in order for the idt5v41064 to meet pci express specifications. crystal capacitors crystal capacitors are connected from pins x1 to ground and x2 to ground to optimize the accuracy of the output frequency. c l = crystal?s load capacitance in pf crystal capacitors (pf) = (c l - 8) * 2 for example, for a crystal with a 16 pf load cap, each external crystal cap would be 16 pf. (16-8)*2=16. current source (iref) reference resistor - r r if board target trace impedance (z) is 50 , then r r = 475 (1%), providing iref of 2.32 ma. the output current (i oh ) is equal to 6*iref. output termination the pci-express differential clock outputs of the idt5v41064 are open source drivers and require an external series resistor and a resistor to ground. these resistor values and their allowable locations are shown in detail in the pci-express layout guidelines section. the idt5v41064 can also be terminated to lvds compatible voltage levels. se e layout guidelines section. output structures general pcb layout recommendations for optimum device performance and lowest output phase noise, the following guidelines should be observed. 1. each 0.01f decoupling capacitor should be mounted on the component side of the board as close to the vdd pin as possible. 2. no vias should be used between decoupling capacitor and vdd pin. 3. the pcb trace to vdd pin should be kept as short as possible, as should the pcb trace to the ground via. distance of the ferrite bead and bulk decoupling from the device is less critical. 4. an optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (any ferrite beads and bulk decoupling capacitors can be mounted on the back). other signal traces should be routed away from the idt5v41064.this includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. r r 475 6*iref =2.3 ma iref see layout guidelines
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 4 idt5v41064 rev g 112111 layout guidelines for pci express common r ecommendations for differential routing d imension or value unit figure l1 length, route as non-coupled 50ohm trace 0.5 max inch 1 l2 length, route as non-coupled 50ohm trace 0.2 max inch 1 l3 length, route as non-coupled 50ohm trace 0.2 max inch 1 rs 33 ohm 1 rt 49.9 ohm 1 down device differential routing l4 length, route as coupled microstrip 100ohm differential trace 2 min to 16 max inch 1 l4 length, route as coupled stripline 100ohm differential trace 1.8 min to 14.4 max inch 1 differential routing to pci express connector l4 length, route as coupled microstrip 100ohm differential trace 0.25 to 14 max inch 2 l4 length, route as coupled stripline 100ohm differential trace 0.225 min to 12.6 max inch 2 pcie reference clock hcsl output buffer l1 l1' rs l2 l2' rs l4' l4 l3 l3' rt rt pci express down device ref_clk input figure 1: down device routing hcsl output buffer l1 l1' rs l2 l2' rs l4' l4 l3 l3' rt rt pci express add-in board ref_clk input figure 2: pci express connector routing
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 5 idt5v41064 rev g 112111 layout guidelines for lvds and other applications vdiff vp-p vcm r1 r2 r3 r4 note 0.45v 0.22v 1.08 33 150 100 100 0.58 0.28 0.6 33 78.7 137 100 0.80 0.40 0.6 33 78.7 none 100 ics874003i-02 input compatible 0.60 0.3 1.2 33 174 140 100 standard lvds r1a = r1b = r1 r2a = r2b = r2 alternative termination for lvds and other common differential signals (figure 3) hcsl output buffer l1 l1' r1b l2 l2' r1a l4' l4 l3 r2a r2b down device ref_clk input figure 3 l3' r3 r4 component value note r5a, r5b 8.2k 5% r6a, r6b 1k 5% cc 0.1 f vcm 0.350 volts cable connected ac coupled application (figure 4) pcie device ref_clk input figure 4 r5a l4' l4 3.3 volts r5b r6a r6b cc cc
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 6 idt5v41064 rev g 112111 typical pci-express (hcsl) waveform typical lvds waveform 0.175 v 0.525 v 0.175 v 0.525 v t or t of 500 ps 500 ps 700 mv 0 1150 mv 1250 mv t or t of 500 ps 500 ps 1325 mv 1000 mv 1150 mv 1250 mv
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 7 idt5v41064 rev g 112111 absolute maximum ratings stresses above the ratings listed below can cause permanent damage to the idt5v41064. these ratings are stress ratings only. functional operation of the device at these or any other conditions above those indicated in the operational sections of the specificat ions is not implied. exposure to ab solute maximum rating conditions for extended periods can affect product reliability. electrical parameters are gua ranteed only over the recommended operating temperature range. dc electrical characteristics unless stated otherwise, vdd = 3.3 v 5% , ambient temperature -40 to +85 c 1 single edge is monotonic when transitioning through region. 2 inputs with pull-ups/-downs are not included. item rating supply voltage, vdd, vdda 5.5 v all inputs and outputs -0.5 v to vdd+0.5 v ambient operating temperature (commercial) 0 to +70 c ambient operating temperature (industrial) -40 to +85 c storage temperature -65 to +150 c junction temperature 125 c soldering temperature 260 c esd protection (input) 2000 v min. (hbm) parameter symbol conditions min. typ. max. units supply voltage v 3.135 3.465 input high voltage 1 v ih 2.2 vdd +0.3 v input low voltage 1 v il vss-0.3 0.8 v input leakage current 2 i il 0 < vin < vdd -5 5 a operating supply current i dd 2 pf load 70 ma input capacitance c in input pin capacitance 7 pf output capacitance c out output pin capacitance 6 pf pin inductance l pin 5nh output resistance rout clk outputs 3.0 k pull-up resistor r pup ss1 100 k
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 8 idt5v41064 rev g 112111 ac electrical characteristics - clk/clk unless stated otherwise, vdd=3.3 v 5% , ambient temperature -40 to +85 c 1 test setup is r s =33 ohms r p =50 ohms with 2 pf, r r = 475 (1%). 2 measurement taken from a single-ended waveform. 3 measurement taken from a differential waveform. 4 measured at the crossing point where instantaneous voltages of both clk and clk are equal. electrical characteristics - differential phase jitter note 1. guaranteed by design and characterization, not 100% tested in production. note 2. see http://www.pcisig.com for complete specs. note 3: applies to 100mhz, spread off and 0.5% down spread only. thermal characteristics parameter symbol conditions min. typ. max. units input frequency 25 mhz output frequency 100 mhz output high voltage 1,2 v oh 660 700 850 mv output low voltage 1,2 v ol -150 0 27 mv crossing point voltage 1,2 absolute 250 350 550 mv crossing point voltage 1,2,4 variation over all edges 40 140 mv jitter, cycle-to-cycle 1,3 25 100 ps rise time 1,2 t or from 0.175 v to 0.525 v 175 332 700 ps fall time 1,2 t of from 0.525 v to 0.175 v 175 344 700 ps rise/fall time variation 1,2 75 125 ps duty cycle 1,3 45 51 55 % stabilization time t stable from power-up vdd=3.3 v 1.2 3.0 ms spread change time t spread settling period after spread change 3.0 ms parameter symbol conditions min typ max units notes jitter, phase t jphasepll pcie gen1 30 86 ps (p-p) 1,2,3 t jphaselo pcie gen2, 10 khz < f < 1.5 mhz 1.2 3 ps (rms) 1,2,3 t jphasehigh pcie gen2, 1.5 mhz < f < nyquist (50 mhz) 1.9 3.1 ps (rms) 1,2,3 parameter symbol conditions min. typ. max. units thermal resistance junction to ambient ja still air 63.2 c/w ja 1 m/s air flow 55.9 c/w ja 2 m/s air flow 53.1 c/w ja 3 m/s air flow 51.4 c/w thermal resistance junction to case jc 65.8 c/w
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 9 idt5v41064 rev g 112111 marking diagrams notes: 1. line 1: ?xxx? is the lot traceability (last numeric character of t he assembly lot number). 2. line 2: ?yyw? ? date code; $ ? assembly location. 3. line 3: truncated idt part number. 4. ?g? designates rohs compliant package. 5. ?i? within the part number indicates industrial temperature range. xxx yww$ 064g xxx yww$ 064gi
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 10 idt5v41064 rev g 112111 package outline and package dimensions (16-pin qfn) package dimensions are kept current with jedec publication no. 95 ordering information ?g" after the two-letter package code are the pb-free configur ation and are rohs compliant. while the information presented herein has been checked for both accuracy and reliability, integrated device technology (idt) a ssumes no responsibility for either its use or for the infringement of any paten ts or other rights of third parties, which would resul t from its use. no other circuits, patents, or licenses are im plied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliab ility, or other extraordinary environmental requirements are not recommended without additional processing by idt. idt reserves th e right to change any circuitry or specifications without noti ce. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments. millimeters symbol min max a0.801.00 a1 0 0.05 a3 0.20 reference b0.180.30 e 0.50 basic n16 n d 4 n e 4 d x e basic 3.00 x 3.00 d2 1.55 1.80 e2 1.55 1.80 l0.300.50 part / order number marking shipping packaging package temperature 5v41064nlg see page 8 trays 16-pin qfn 0 to +70 c 5v41064nlg8 tape and reel 16-pin qfn 0 to +70 c 5v41064nlgi trays 16-pin qfn -40 to +85 c 5V41064NLGI8 tape and reel 16-pin qfn -40 to +85 c sawn singulation 1 2 n e d index area top view seating plane a3 a1 c a l e2 e2 2 d2 d2 2 e c 0.08 (ref) n d & n e odd (ref) n d & n e even (n d -1)x (ref) e n 1 2 b thermal base (typ) if n d & n e are even (n e -1)x (ref) e e 2
idt5v41064 1 output pcie gen1/2 synthesizer idt? 1 output pcie gen1/2 synthesizer 11 idt5v41064 rev g 112111 revision history rev. originator date description of change a 04/01/08 initial release - preliminary. b rw 03/02/10 1. updated titl e and features bullets 2. added differential phase jitter table 3. updated cycle-to-cycle jitt er spec from 80ps to 125ps c rdw 06/18/10 1. updated pack age and pinout to 16qfn. 2. added spread spectrum. d rdw 07/19/10 1. updated title and general description 2. updated cycle-to-cycle jitter spec from 125 to 100 ps e rdw 12/21/10 1. minor corrections 2. updated with typical data 3. released to final f rdw 10/28/11 updated thermal char data g rdw 11/21/11 1. changed title to ?1 output pcie gen1/2 synthesizer? 2. added note to features section: ?for pcie gen3 applications, see 5v41234? 3. updated differential phase jitter table.
? 2010 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. idt, ic s, and the idt logo are trademarks of integrated device technology, inc. accelerated thinking is a service mark of integrated device technology, inc. all other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. printed in usa corporate headquarters integrated device technology, inc. www.idt.com for sales 800-345-7015 408-284-8200 fax: 408-284-2775 for tech support www.idt.com/go/clockhelp innovate with idt and accelerate your future netw orks. contact: www.idt.com idt5v41064 1 output pcie gen1/2 synthesizer

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